This document describes an accelerated stress and test methodology for measuring device parameter changes of a single p-channel MOSFET after Negative Bias Temperature Instability (NBTI) stress at dc bias conditions. This document gives a procedure to investigate NBTI stress in a symmetric voltage condition with the channel inverted (VGS lt;0) and no channel conduction (VDS = 0).There can be NBTI degradation during channel conduction (VGSlt; 0, VDSlt; 0), however, this document does not cover this phenomena.