JEDEC JESD82
JEDEC JESD82 2000-JUL-01 Defnton of CDCV857 PLL Clock Drver for Regstered DDR DMM Applcatons
JEDEC JESD82 2000-JUL-01 Defnton of CDCV857 PLL Clock Drver for Regstered DDR DMM Applcatons
This specification is a reference for Registered DDR DIMM designers. JESD82 defines the physical, electrical, interface and timing requirements of a 1:10 PLL clock driver for DDR Registered DIMMs from DDR200 to DDR266 as refined in revision C of JEDEC Standard 21-C (JESD21-C). JESD82 was also written to meet the future performance requirements of Registered DIMMs for DDR300 and DDR333.