JEDEC JESD82-4B
JEDEC JESD82-4B 2003-MAY-01 Defnton of the SSTV16859 25 V 13-Bt to 26-Bt SSTL_2 Regstered Buffer for Stacked DDR DMM Applcatons
JEDEC JESD82-4B 2003-MAY-01 Defnton of the SSTV16859 25 V 13-Bt to 26-Bt SSTL_2 Regstered Buffer for Stacked DDR DMM Applcatons
This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of the SSTV16859 13-bit to 26-bit SSTL_2 registered buffer for stacked DDR DIMM applications. The purpose is to provide a standard for the SSTV16859 logic device, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.