JEDEC JESD52
JEDEC JESD52 1995-NOV-01 Descrpton of Low Voltage TTL-Compatble CMOS Logc Devces
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This standard describes dc interface specifications and test environment for these devices that operate with 2.7 V to 3.6 V power supplies. The goal is to provide a consistent set of dc specifications for reference by logic suppliers and users alike.