JEDEC JESD8-26
JEDEC JESD8-26 2011-SEP-01 12 V HGH-SPEED LVCMOS HS_LVCMOS NTERFACE
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This standard defines the dc and ac input levels, output levels, and input overshoot and undershoot specifications for the 1.2 V High-speed LVCMOS (HS_LVCMOS) interface. The non-terminated interface has a switching range that is nominally expected to be 0 V to 1.2 V and is primarily intended to support communications with Wide I/O SDRAM devices.