JEDEC JESD8-15A
JEDEC JESD8-15A 2003-SEP-01 Stub Seres Termnated Logc for 18 V SSTL_18
This standard defines the input, output specifications and ac test conditions for devices that are designed to operate in the SSTL_18 logic switching range, nominally 0 V to 1.8 V. The standard may be applied to ICs operating with separate VDD and VDDQ supply voltages. The VDD value is not specified in this standard; however VDD and VDDQ will have the same voltage level in many cases.