This document describes manufacturing process simulations for use with applicable component specifications to assure that electronic components can meet expected reliability requirements after exposure to assembly factory processes. It is not intended as an assembly production specification or a stand alone qualification document. The procedure consists of a set of assembly process simulations which can be performed by either the component user or manufacturer prior to reliability testing as specified in the applicable component qualification and reliability monitoring documents. The simulations include alternative conditions depending on the component type, physical characteristics and anticipated use.

It is expected that a single component would be evaluated for a subset of the alternative conditions. For example, large integrated circuit (IC) packages (e.g., PQFP’s) might be qualified utilizing the lower of two reflow temperature ranges while smaller packages, which typically become much hotter during infrared or convection reflow, might be qualified for the higher range. Similarly, components with physical characteristics which prohibit total immersion cleaning would not be evaluated for this type of cleaning process.

Unless otherwise specified, this document applies to both surface-mount (SM) reflowed components and through-hole (TH) discrete and IC components, which are wave soldered or reflowed. For wave solder of SM ICs, user and supplier should work together to identify appropriate procedures. The document is intended to complement other industry documents, such as JESD22-A113 and IPC-SM-786 which define moisture sensitivity levels and surface mount ICs for a specific set of process conditions.